Encoders and Decoders in Digital Electronics

Encoders and decoders are two of the most fundamental building blocks in digital electronics. They belong to the family of combinational circuits, meaning their outputs depend only on the present combination of inputs and not on any stored history. A decoder takes a compact binary code and activates exactly one of many output lines, while an encoder does the reverse, compressing many input lines into a smaller binary code. Understanding how these circuits work is essential for anyone studying memory addressing, instruction decoding, data routing, or display drivers. This reference article explains the theory, truth tables, Boolean expressions, and real applications behind both devices. (If you are looking for the HDL implementation instead of the concept, see our companion page on Verilog code for a decoder.)

What Is a Decoder?

A decoder is a combinational logic circuit that converts an n-bit binary input into a maximum of 2ⁿ unique output lines, with only one output asserted (usually HIGH) for each input combination. Because each input code selects one and only one output, a decoder is often described as a “minterm generator”: every output line corresponds to a distinct minterm of the input variables. Decoders are usually named by their input-to-output ratio, so a circuit with 2 inputs and 4 outputs is a 2-to-4 decoder, and one with 3 inputs and 8 outputs is a 3-to-8 decoder. Most practical decoders also include an enable input; when enable is inactive, all outputs are forced to their inactive state regardless of the data inputs.

2-to-4 Decoder: Truth Table and Boolean Expressions

The 2-to-4 decoder has two select inputs, A₁ and A₀, and four outputs, D₀ through D₃. The following truth table assumes an active-HIGH enable input E; when E = 0 every output is 0.

From the truth table, each output is the AND of the appropriate true or complemented inputs together with the enable:

• D₀ = E · A₁′ · A₀′
• D₁ = E · A₁′ · A₀
• D₂ = E · A₁ · A₀′
• D₃ = E · A₁ · A₀

The primes (′) denote logical NOT. These expressions are simply the four minterms of two variables, which is why a decoder needs two inverters (to produce A₁′ and A₀′) and four three-input AND gates. If you want to practise deriving such expressions yourself, the Karnaugh map technique maps directly onto decoder outputs.

Block Diagram of a Decoder

The block diagram of a decoder is drawn as a rectangular block with the n select lines and one enable line entering from the left and the 2ⁿ output lines leaving from the right. Internally, the data inputs first pass through inverters so that both polarities of every input are available on a set of vertical rails. A row of AND gates then sits across those rails; each AND gate taps exactly the combination of rails that corresponds to its minterm, and the enable line is fed into every AND gate so a single signal can blank the whole block. Conceptually:

• Inputs: A_n-1 … A₀ (the binary code) plus an Enable line.
• Core: input inverters feeding a bank of 2ⁿ AND gates.
• Outputs: D₀ … D_2ⁿ-1, exactly one active at a time.

This regular structure is why decoders scale cleanly: a 3-to-8 decoder is just a wider version of the same pattern, and large decoders are frequently built by combining smaller ones with their enable pins.

3-to-8 Decoder

The 3-to-8 decoder accepts a 3-bit input (A₂, A₁, A₀) and drives eight outputs, D₀ to D₇. Each output again equals one minterm of the three inputs. With enable asserted, the behaviour is shown below.

The corresponding Boolean expressions follow the same minterm pattern, for example D₀ = A₂′A₁′A₀′, D₅ = A₂A₁′A₀, and D₇ = A₂A₁A₀. A useful property is that because the outputs are all the minterms, any Boolean function of three variables can be realized simply by OR-ing together the decoder outputs that correspond to the function’s ones.

What Is an Encoder?

An encoder performs the inverse operation of a decoder. It is a combinational circuit with up to 2ⁿ input lines and n output lines, producing the binary code that identifies which input is active. A simple 2ⁿ-to-n encoder assumes that exactly one input is HIGH at any time, and outputs the index of that input in binary. Encoders are widely used to reduce the number of wires needed to represent “which of many events happened,” such as compressing the output of a keypad or an interrupt-request bank.

8-to-3 Encoder

An 8-to-3 (octal-to-binary) encoder has eight inputs, D₀ to D₇, and three outputs, A₂, A₁, A₀. When input D_i is HIGH, the output is the binary value of i. Assuming one-hot inputs, the outputs are obtained by OR-ing every input whose index has a 1 in the relevant bit position:

• A₂ = D₄ + D₅ + D₆ + D₇
• A₁ = D₂ + D₃ + D₆ + D₇
• A₀ = D₁ + D₃ + D₅ + D₇

A limitation of this plain encoder is ambiguity: if two inputs are HIGH at once, the OR gates produce a code that corresponds to neither input, and if no input is HIGH the output is 000, indistinguishable from D₀ being active. Priority encoders solve both problems.

Priority Encoder (4-to-2)

A priority encoder resolves the case of multiple simultaneous active inputs by assigning each input a priority and encoding only the highest-priority active input. A 4-to-2 priority encoder has inputs D₀ to D₃ (with D₃ highest priority), outputs A₁ and A₀, and a valid output V that indicates whether any input at all is active. The “X” entries below are don’t-cares, meaning lower-priority inputs are ignored once a higher one is HIGH.

From this table the simplified Boolean expressions are:

• A₁ = D₃ + D₂
• A₀ = D₃ + D₁ · D₂′
• V = D₀ + D₁ + D₂ + D₃

The valid bit V is what makes the output unambiguous: when V = 0, the code on A₁A₀ should be ignored because no input is active. This same priority concept scales up to the familiar 8-to-3 priority encoder used in interrupt controllers.

Decoder vs Encoder: Comparison Table

Although they are inverses of each other, decoders and encoders differ in several practical respects.

Applications of Decoders and Encoders

Decoder applications are found throughout digital systems wherever a compact code must select one resource among many:

• Memory address decoding: the high-order address bits from a processor feed a decoder whose outputs act as chip-select signals, enabling exactly one memory bank or peripheral at a time.
• Demultiplexer (demux): a decoder with an enable input behaves as a 1-to-2ⁿ demultiplexer when the data to be routed is applied to the enable line, steering a single input to a chosen output.
• Instruction decoding: inside a CPU, the opcode field is decoded to activate the control signals for the selected operation.
• Seven-segment and display drivers: BCD-to-seven-segment decoders translate a binary digit into the pattern of segments to light.

Encoders are equally important wherever many signals must be summarized into a few:

• Keypad and keyboard scanning: a pressed key is converted into its binary or scan code.
• Interrupt priority resolution: a priority encoder identifies the highest-priority pending interrupt line for the processor to service.
• Data compression and multiplexer control: encoders generate the select lines that drive multiplexers, the dual of the demux use above.

Decoders and encoders are purely combinational, but they are frequently paired with storage elements such as a JK flip-flop and other registers to build the larger sequential circuits that form the datapath and control units of real processors.

Learn Encoders, Decoders and Full RTL Design

Encoders and decoders are the gateway to mastering combinational and sequential logic design. If you want to move from paper truth tables to designing, simulating, and synthesizing real hardware, explore our Advanced RTL Design course, where these fundamentals are applied to industry-grade digital design projects.

Frequently Asked Questions

What is a decoder in digital electronics?

A decoder in digital electronics is a combinational circuit that converts an n-bit binary input into up to 2ⁿ output lines, activating exactly one output for each unique input code. Each output represents one minterm of the input variables, which is why decoders are also called minterm generators.

What is the difference between an encoder and a decoder?

An encoder compresses many input lines into a smaller binary code using OR gates, while a decoder expands a binary code into many individual output lines using AND gates. In short, an encoder answers “which line is active?” and a decoder answers “activate the line named by this code.” They perform exactly opposite functions.

Why do we use a priority encoder?

A simple encoder gives an incorrect result when more than one input is active at the same time, and it cannot distinguish “no input active” from “input zero active.” A priority encoder solves both issues by encoding only the highest-priority active input and providing a valid output bit that confirms at least one input is HIGH.

How can a decoder be used as a demultiplexer?

If the enable pin of a decoder is used as the data input and the select pins choose the destination, the single enable signal is routed to whichever output the select code points to. In this configuration the decoder functions as a 1-to-2ⁿ demultiplexer, making decoders and demultiplexers closely related devices.

What is the block diagram of a decoder made of?

The block diagram of a decoder consists of input inverters that produce both polarities of each select line, a bank of 2ⁿ AND gates that each detect one input combination, and an enable line connected to every AND gate so all outputs can be disabled together. The result is one active output per input code.

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